*Result*: The Four Rs of Efficient System Design.

*This article for senior programming designers examines high-level design techniques and how they can improve logic and system design. Field programmable gate array chips are approaching application specific integrated circuit-like density and performance with their inherent cost advantages and reprogrammability clearly in their favor. With embedded digital service providers and central processing unit cores now available for use in field programmable gate arrays, these programmable logic devices are a real alternative for many embedded system designers. Designers of application specific integrated circuits are turning to field programmable gate arrays for new designs. And as high-end high gate array circuits encroach on application specific integrated circuits encroach performance, these integrated circuits are being adopted for field programmable gate array. The article begins with the introduction of the conventional hardware-design flow and examine its associated problems. Alternative approaches to hardware design using C/C++ computer language will be discussed, comparing the advantages and disadvantages of timed design languages with those of non-timed or algorithmic languages.*