Significant service restrictions in the lending area from 17 March!

Result: Time constrained verification of analog circuits using model-checking algorithms

Title:
Time constrained verification of analog circuits using model-checking algorithms / Darius Grabowski, Daniel Platte, Lars Hedrich, Erich Barke
Involved:
Grabowski, Dariusz (Verfasser) ; Platte, Daniel (Verfasser) ; Hedrich, Lars (Verfasser) ; Barke, Erich (Verfasser) 
Published in:
Enthalten in: Electronic notes in theoretical computer science. - Amsterdam : Elsevier, 07.06.2006. - Seite 37-52. - 10.1016/j.entcs.2006.01.026. - ISSN 1571-0661. - Jahrgang 153, Heft 3
Published:
Amsterdam : Elsevier, 07.06.2006
Distribution:
Frankfurt am Main : Universitätsbibliothek Johann Christian Senckenberg
Scope:
1 Online-Ressource (16 Seiten)
Format:
eBook
Language:
English
DOI:
10.1016/j.entcs.2006.01.026
Open Access Rights:
Open Access
CC BY-NC-ND 4.0

Additional information

Additional functions