• An Automated and Effective App...

*Result*: An Automated and Effective Approach for SBST Generation Targeting RISC-V CPUs

Title:
An Automated and Effective Approach for SBST Generation Targeting RISC-V CPUs
Authors:
Kaja, Endri, Gerlin, Nicolas, Halabi, Jad Al, Tahiraga, Ares, Prebeck, Sebastian, Stoffel, Dominik, Kunz, Wolfgang, Ecker, Wolfgang
Source:
2024 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2024 IEEE International Symposium on. :1-4 Oct, 2024
Relation:
2024 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)
Database:
IEEE Xplore Digital Library