• FPGA-Based Improved Background...

*Result*: FPGA-Based Improved Background Subtraction for Ultra-Low Latency

Title:
FPGA-Based Improved Background Subtraction for Ultra-Low Latency
Authors:
Oshima, Y., Yamaguchi, Y., Tsugami, R., Fujiwara, T., Fukui, T., Narikawa, S.
Source:
IEEE Access Access, IEEE. 12:164063-164080 2024
Database:
IEEE Xplore Digital Library