*Result*: Author manuscript, published in '41st European Solid-State Device Research Conference (ESSDERC 2011), Helsinki: Finland (2011)' Efficent Low Cost Process For Single Step Metal Forming of 3D Interconnected Above-IC Inductors

Title:
Author manuscript, published in '41st European Solid-State Device Research Conference (ESSDERC 2011), Helsinki: Finland (2011)' Efficent Low Cost Process For Single Step Metal Forming of 3D Interconnected Above-IC Inductors
Contributors:
The Pennsylvania State University CiteSeerX Archives
Publication Year:
2011
Collection:
CiteSeerX
Document Type:
*Academic Journal* text
File Description:
application/pdf
Language:
English
Rights:
Metadata may be used without restrictions as long as the oai identifier remains attached to it.
Accession Number:
edsbas.EFC63987
Database:
BASE

*Further Information*

*— This paper presents a novel and efficient low cost process capable of integrating high-Q above-IC inductors and their interconnects using a single electroplating step. It relies on the SU8 and BPN resist as well as an optimized electroplating technique to form the 3D interconnected inductor. The SU8 is used to form a thick layer located underneath the inductor to elevate it from the substrate. Then, the BPN is used as a high resolution mold (16:1) for copper electroplating. Standard or time optimized electroplating is later used to grow copper in a 3D manner, making the transition between all metallic layers straight forward. High-Q (55 @ 5 GHz) power inductors have been designed and integrated above an RF power LDMOS device using this process. Finally, the process capabilities are demonstrated by integrating a solenoid inductor using only two lithography masks and a single electroplating step. I.*