CHEN, Deming, CONG, Jason, ERCEGOVAC, Milos und HUANG, Zhijun, 2003. Performance-Driven Mapping for CPLD Architectures. IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems. 1 Oktober 2003. Vol. 22, no. 10, p. 1424-1431. DOI 10.1109/TCAD.2003.818120.
Elsevier - Harvard (with titles)Chen, D., Cong, J., Ercegovac, M., Huang, Z., 2003. Performance-Driven Mapping for CPLD Architectures. IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems 22, 1424-1431. https://doi.org/10.1109/TCAD.2003.818120
American Psychological Association 7th editionChen, D., Cong, J., Ercegovac, M., & Huang, Z. (2003). Performance-Driven Mapping for CPLD Architectures. IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems, 22(10), 1424-1431. https://doi.org/10.1109/TCAD.2003.818120
Springer - Basic (author-date)Chen D, Cong J, Ercegovac M, Huang Z (2003) Performance-Driven Mapping for CPLD Architectures.. IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems 22:1424-1431. https://doi.org/10.1109/TCAD.2003.818120
Juristische Zitierweise (Stüber) (Deutsch)Chen, Deming/ Cong, Jason/ Ercegovac, Milos/ Huang, Zhijun, Performance-Driven Mapping for CPLD Architectures., IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems 2003, 1424-1431.